AA77 FDR Data, Explained

[jaydeehess]

Speaking of stepping up to the plate... http://www.internationalskeptics.com/forums/showthread.php?t=124431

He misspoke apparently, as is indicated above;

Why don't you guys sign up at some engineering forums and I'll do the same?

When he said days ago that he was signing up and posting the question what he meant was, that he was going to threaten to do so but never actually do it.

 

[jaydeehess]

.........How can you not wipe out entire blocks as opposed to six seconds worth?

...............
If a transient , arc, or static discharge targeted a gate in a "one" state,
that voltage would be shared with all other gates on that line. Therefore,
if you have enough potential voltage to change the state of one gate, you
have the potential voltage to change all gates on that address line.
VOltage is shared in a parllel circuit.

The transient cannot single out just one, or two bits (gates). The transient
would change several thousand gates effectively wiping out an entire block
of data.

J. Portal et al.

Three sets of faults can be identified, depending on the localization of the bridge resistance. The first set includes the intra-cell faults,
the second set includes the inter-cell faults, and the third the array faults. These sets are defined respectively as follows:
The intra-cell faults are the bridging faults between two internal nodes of a same cell or between an internal node and an external node of a same cell [sic]. [...]
The inter-cell faults are the bridging faults between an internal node of a cell and an external or internal node of an adjacent cell. [...]
The array faults are the bridging faults between two nets of the array illustrated in Figure 1.a. [...]

Source: J. Portal, A. Perez, "Analyzing Bridging Faults Impact on EEPROM Cell Array," Proceedings of the 2001 IEEE European Test Workshop, pp. 3-8, May 29-June 1, 2001, Stockholm, Sweden.

Faults involving more than one cell, go figure?

 

[Turbofan]

So you prove the authors of the texts Mackey cites wrong then? IS that what you are saying?

You do understand what they are saying, right?

Yes, I have already addressed this article. My post is above.

Notice the author states that blocks of data are effected.

Since you're on the ball with electronics, you should be able to understand
how voltage and current works. If you want to discuss reactance, that's
fine too, but the basic parallel principles still apply in these circuits.

Imagine this. Everyone is holding onto a wire above their head and standing
on the ground. We all have internal resistance. Let's say we're all pretty close.

If a transient hits the wire above their head, are we all going to feel it?

If the transient hits ground and raises the zero reference, are we all going
to feel it?

If the transient hits one single person, are we all going to feel it?

 

[DavidJames]

He misspoke apparently, as is indicated above;


When he said days ago that he was signing up and posting the question what he meant was, that he was going to threaten to do so but never actually do it.

Nice catch. So, to recap...
On Sunday at 8:40 AM MDT TurboFan posts this:

Yup, I stayed home on a Saturday night and registered to all of the EE forums to please WC!

Then on Monday at 5:24 PM MDT he posts this:

Why don't you guys sign up at some engineering forums and I'll do the same?

Tell me TF, are you a liar, forgetful, or what?

ETA
Before you answer TF, you may want to go back and see what you've posted regarding this, you already look foolish as it is.

Also, thanks for proving why a venue like this is best for a debate and not a phone call. At least for honest people.

 

[jaydeehess]

Yes, I have already addressed this article. My post is above.

Yeah, basically you say they are wrong.

Notice the author states that blocks of data are effected.

Since you're on the ball with electronics, you should be able to understand
how voltage and current works. If you want to discuss reactance, that's
fine too, but the basic parallel principles still apply in these circuits.

Yep, when all is within spec then all works according to spec.

Imagine this. Everyone is holding onto a wire above their head and standing
on the ground. We all have internal resistance. Let's say we're all pretty close

Is that physically close or our resistances are all within a few percent of each other?

If a transient hits the wire above their head, are we all going to feel it?

If the transient hits ground and raises the zero reference, are we all going
to feel it?

If the transient hits one single person, are we all going to feel it?

Yes, but depending on the rise and fall time some of us will get jolted while others will merely feel a tingle.

Then again you are also attempting to use a situation in the macro-world as ana anlogy in the micro-world of high density IC's in which electron tunneling can take place and corruption of one bit's transistor storage can also corrupt that of another that is physically proximate to the one affected by the transient.

now if a word is written to one area on the chip where, on the chip, do you suppose the last word is stored? near, or far away? What would be the probability of adjacent cells affecting each other in severe circumstances as opposed to cells widely separated? What characterizes the cells being accessed as opposed to those written to last and those written to several minutes agao?

 

[WildCat]

Nice catch. So, to recap...
On Sunday at 8:40 AM MDT TurboFan posts this:Then on Monday at 5:24 PM MDT he posts this:Tell me TF, are you a liar, forgetful, or what?

It's even worse - check out posts 2403 and 2406...

 

[Myriad]

Since you're on the ball with electronics, you should be able to understand
how voltage and current works. If you want to discuss reactance, that's
fine too, but the basic parallel principles still apply in these circuits.

Imagine this. Everyone is holding onto a wire above their head and standing
on the ground. We all have internal resistance. Let's say we're all pretty close.

If a transient hits the wire above their head, are we all going to feel it?

If the transient hits ground and raises the zero reference, are we all going
to feel it?

If the transient hits one single person, are we all going to feel it?

We will not feel it equally. The approximations and assumptions of DC fall short in AC situations such as transients. For a rapidly changing (transient) potential, the impedance of the wire (assumed to be zero in DC approximations) becomes significant, and the impedance of each person is significantly reduced. Thus each person along the wire away from the point where the transient hits becomes a stage in a network of voltage dividers, and experiences successively attenuated effects. At some point along the wire, if there are enough people, the potential on the wire will drop below the threshold for "feeling it" at all.

This is very basic stuff, Turbofan. Your all-or-nothing idealizations (either nothing is damaged, or every connected node is damaged) speak to a lack of hands-on experience.

Respectfully,
Myriad

 

[DavidJames]

It's even worse - check out posts 2403 and 2406...

Oh yeah, how about this - posted about 36 hours ago:

BTW, the links will be available soon. First, I want to back up my harddrive before the next lightning storm. I don't want my data to get re-written from transients!

 

[funk de fino]

You mean like RAD ALT? Something that the NTSB left out, but PFT decoded?
It works just fine.
You might also want to read this document from the NTSB:

http://www.ntsb.gov/info/AAL77_fdr.pdf

"An examination of the recovered data indicated that the recorder operated normally"

Except the report as I have already stated says "The remaining parameters either were not recorded properly or were not confirmed to have been recorded properly, and are not included in this report"

Why were there parameters unsucessfully recorded? What caused these parameters to not record properly?

Your cherry pick states that the recorder operated successfully. No-one disputes this as there is data in the recording. This does not mean every piece of data was in fact recorded and the statement I posted comes directly after the one you posted.

What caused the missing data?

Found a name from the pft list of liars yet with my FDR experience?

 

[Turbofan]

Thus each person along the wire away from the point where the transient hits becomes a stage in a network of voltage dividers, and experiences successively attenuated effects.

Voltage divider in parallel? Are you feeling alright?

At some point along the wire, if there are enough people, the potential on the wire will drop below the threshold for "feeling it" at all.

Well you tell me how many 'people' are hanging on the EEPROM wire
and what their resistance will be when their address line is not enabled.

Can you also tell me the distance between each gate and calculate the
voltage at each node? You say it's pretty simple, so let' see the numbers.

 

[funk de fino]

"The remaining parameters either were not recorded properly or were not confirmed to have been recorded properly, and are not included in this report"

 

[Turbofan]

Yeah, basically you say they are wrong.

No, I am not. I am stating that Mackey is using the article's context in the
wrong manner. Mackey is talking abuot single bit flipping. The article is
talking abuot BLOCKS of data.

See the difference?

Is that physically close or our resistances are all within a few percent of each other?

Both.

Yes, but depending on the rise and fall time some of us will get jolted while others will merely feel a tingle.

Same question to you as presented to Myriad. How far away do you believe
these gates are positioned?

Then again you are also attempting to use a situation in the macro-world as ana anlogy in the micro-world of high density IC's in which electron tunneling can take place and corruption of one bit's transistor storage can also corrupt that of another that is physically proximate to the one affected by the transient.

Marco, or Micro. Parallel is parallel. Do I need to draw a circuit to explain this
concept?

now if a word is written to one area on the chip where, on the chip, do you suppose the last word is stored? near, or far away?

In this scenario, the data would likely be stored as contiguous data and
not fragmented for some sort of security purpose. Near. (Is Grover
going to appear soon? )

What would be the probability of adjacent cells affecting each other in severe circumstances as opposed to cells widely separated?

Well that depends on the IC design. As stated many times, the gates
are tied together. You are talking about single cell state change.

What characterizes the cells being accessed as opposed to those written to last and those written to several minutes agao?

Nothing, unless you mean the bit/gate that is currently accessed and receiving
a write instruction?

The difference between the two would be address lines enabled (vs. tri-stated), current paths, etc.

Anyone care to explain how just one gate can be altered in such a design?

P.S. Funk, can you make that text a little bigger, and more bold? Did you
forget that PFT decoded the parameters that the almighty NTSB left out?
IE: RAD ALT?

You shuold probably contact Undertow and he can school you on how
easy that was to retrieve.

 

[funk de fino]

P.S. Funk, can you make that text a little bigger, and more bold? Did you
forget that PFT decoded the parameters that the almighty NTSB left out?
IE: RAD ALT?

What does the statment I have posted numerous times mean TF? It is not difficult. Why is there data not recorded? what could have caused some data to be not recorded?

I know why you are refusing to answer. Why do you need undertow to hold your hand to answer a simple question like this. Also note the word "properly" in the statement. What do you think this means?

ETA - name yet?

 

[bje]

P.S. Funk, can you make that text a little bigger, and more bold? Did you
forget that PFT decoded the parameters that the almighty NTSB left out?
IE: RAD ALT?

Perhaps you would be kind enough to tell us how your claims means AA77 flew over the Pentagon.

Isn't that your point, after all?

 

[Turbofan]

What does the statment I have posted numerous times mean TF? It is not difficult. Why is there data not recorded? what could have caused some data to be not recorded?

I know why you are refusing to answer. Why do you need undertow to hold your hand to answer a simple question like this. Also note the word "properly" in the statement. What do you think this means?

ETA - name yet?

Maybe I need to start bolding things:

THE DATA WAS RECORDED AND RETRIEVED FINE BY
PFT. IE: RAD ALT. I don't know why the NTSB left this out (**cough )...but the parameter was recorded. UNDERSTOOD?

For a complete list of what was retrieved, contact UT. The important parameters (the ones needed to show AA77 was too high
and off course) are all that we need.

I don't need UT to hold my hand, however the process of decoding the raw
file is HIS baby, not mine. If it was easy Mackey, Anti and you would have
a copy of the raw file decoded.

What do you think this means?

 

[lapman]

You're also forgetting anomalies in the silicon the transistors are etched into that can greatly reduce the life of a transistor or group of transistors. These anomalies can also make a transistor more sensitive to transients.

 

[lapman]

Maybe I need to start bolding things:

THE DATA WAS RECORDED AND RETRIEVED FINE BY
PFT. IE: RAD ALT. I don't know why the NTSB left this out (**cough )...but the parameter was recorded. UNDERSTOOD?

For a complete list of what was retrieved, contact UT. The important parameters (the ones needed to show AA77 was too high
and off course) are all that we need.

I don't need UT to hold my hand, however the process of decoding the raw
file is HIS baby, not mine. If it was easy Mackey, Anti and you would have
a copy of the raw file decoded.

What do you think this means?

Why did the NTSB make the CSV file in the first place?

 

[Turbofan]

You're also forgetting anomalies in the silicon the transistors are etched into that can greatly reduce the life of a transistor or group of transistors. These anomalies can also make a transistor more sensitive to transients.

Right and that would have made that bit/gate damaged. Are you able to access that address/bit then?

 

[lapman]

Right and that would have made that bit/gate damaged. Are you able to access that address/bit then?

Nope. And if it transister went bad during that last 6 seconds, no data from that address.

 

[DC]

What does the statment I have posted numerous times mean TF? It is not difficult. Why is there data not recorded? what could have caused some data to be not recorded?

I know why you are refusing to answer. Why do you need undertow to hold your hand to answer a simple question like this. Also note the word "properly" in the statement. What do you think this means?

ETA - name yet?

normaly you will find a detailed description why this is, but not for the 9/11 NTSB FDR reports