AA77 FDR Data, Explained

[MacGyverS2000]

As he has quoted, the block erase size is approximately 128K for data blocks. We are talking about 14K of data.

My question still stands: If gates are tied together for block erase, how does just a few of these gates received the erase voltage without wiping out the entire block?

An excellent question, and one I'm happy to answer for everyone else's benefit. You make the erroneous assumption that a block erase command erases an entire block of memory in an instant. You can time with a stopwatch how long it takes a 128Mb flash to erase all of its blocks. Think on the order of a full second to erase a single block (max spec is typically a full 4 seconds to erase a single block)!

This should point out the fact that the entire block isn't erased at once, but in lines (columns or rows, take your pick). Care to take a guess what would happen if the erase process was interrupted in the middle? Since the write latency must be <500ms, this tells you right away the firmware must continually suspend the block erasure process to write incoming frame data. I won't bother getting into the myriad of possible problems these suspends can have on data integrity, particularly in a transient-rich electrical environment.

Furthermore, as power decays how is the gate biased with sufficient voltage such that the transistors are able to change state.

You need to spend some time looking at hot-electron injection and quantum tunneling... these are the two processes by which the transistors (MOSFETS) change their state (at least for a NOR-based package). Flash chips contain their own charge pump to create the higher programming voltage, and I think it should be quite obvious by now that a charge pump is going to have some weird outputs during transients (where under the right conditions "ground" can actually be at a higher voltage then "power").



So I say yet again, your theories are easily blown out of the water. I'm not pulling the stuff out of my ass, these are well known and (mostly) well-defined failure modes. The next step to proving all of this to you will involve semiconductor physics, something I'm not prepared to waste time discussing and few here are informed enough to comprehend without heavy explanation.

My previous statement stands, I have zero interest in my name being associated with your claims. You have repeatedly shown a penchant for ignoring my direct answers to your specific questions when push comes to shove about your overall claims, so I will no longer increase my risk of carpal tunnel just to argue minutiae that is no longer relevant. I never had delusions about friendships here (my statement was metaphorical in nature), but I obviously hoped for too much when I thought pure scientific fact would be taken for its own value and not abused.

 

[Bobert]

nevermind

 

[Hokulele]

<snip>

You need to spend some time looking at hot-electron injection and quantum tunneling... these are the two processes by which the transistors (MOSFETS) change their state (at least for a NOR-based package). Flash chips contain their own charge pump to create the higher programming voltage, and I think it should be quite obvious by now that a charge pump is going to have some weird outputs during transients (where under the right conditions "ground" can actually be at a higher voltage then "power").

So I say yet again, your theories are easily blown out of the water. I'm not pulling the stuff out of my ass, these are well known and (mostly) well-defined failure modes. The next step to proving all of this to you will involve semiconductor physics, something I'm not prepared to waste time discussing and few here are informed enough to comprehend without heavy explanation.

<snip>

If you plan to leave this thread, can you please offer some recommendations for books or journals that can explain some of these things? I am certainly not an EE, but have a little background in physics, and the application of the two processes you mentioned (my bolding) sound fascinating. Thanks!

 

[D'rok]

Good lord. You'd think Turbo would've have learned his lesson the first time this happened.

But I'm glad he came back. This thread is lurker paradise!

 

[Bobert]

Turbofan is slaughtered by an unbiased individual that he basically initiated the conversation with.
This should be a shining example for you TF of what when your CIT fantasies meet the real world.
This is YET ANOTHER EXAMPLE of why you and the CIT will stay behind your keyboards battling it out.

 

[MacGyverS2000]

If you plan to leave this thread, can you please offer some recommendations for books or journals that can explain some of these things? I am certainly not an EE, but have a little background in physics, and the application of the two processes you mentioned (my bolding) sound fascinating. Thanks!

Nothing off of the top of my head, but that's mainly because I typically don't touch that level of detail in my work (being mostly a firmware engineer these days). In my undergrad days, the class I took on semiconductors used (essentially) a bound form of the diode inventor's lab notebook... yeah, following that one was a major challenge in patience, to say the least.

I don't want to sidetrack this thread, but in a nutshell there are two types of flash memory in use these days... NOR and NAND. NOR uses hot-electron injection to write a bit and quantum tunneling to clear it. NAND uses tunnel injection to write a bit and tunnel release for reading.

For hot-electron injection, a high (write) voltage is used to inject a charge carrier from the substrate to the gate. Since the gate is (comparatively speaking) insulated, the charge "sticks" and the bit is now read as a zero.

For quantum tunneling, the opposite effect is essentially what happens, even though the charge has a lower kinetic energy than the barrier (gate oxide) it's punching through.

Tunnel injection is the same effect as quantum tunneling, but it's happening in the same direction as the hot-electron injection method. In other words, the charge carrier has less kinetic energy than it would take to cross the barrier according to classical mechanics.

And obviously quantum release is the clearing method using the same technique.

 

[Hokulele]

Thanks MacGyverS2000. At least that gives me a few search terms to hand over to the local research librarian. I have a long flight coming up in a few weeks, and that will give me something to read other than the latest romance novel.

[/derail]

 

[R.Mackey]

Ookay, well, this thread has jumped just about every shark in the sea at this point...

Erased a few seconds of data is not likely after written without wiping out
an entire block along with it. This is the detail that I don't believe MacGyver
is getting due to the smoke and mirrors presented by yourself and many other
members here.

No. Since everyone here (except you) accepts that Flash memory faults are possible, even reasonable, I'm just going to go ahead and declare this issue settled. I invite you to re-read the very, very many explanations you've been given with an open mind and try to learn from this experience. I also encourage you, as I have countless others, to seek independent advice from professors and other (legitimate) EE experts.

And that pretty much does it for the FDR missing data discussion. If you want to continue this discussion anyway, there's only one thing I'd be interested in from you, and that is your best guess as to what happened.

Don't try to eliminate the data we have, try to come up with an explanation for it. Let's see what you can think of. You cannot eliminate our theory, since everyone who understands the physics is in agreement, but you can potentially come up with a better one. Well? Can you?

Are you kidding me? After COUNTLESS attempts to get you guys in a room,
or live on radio which you FLAT OUT REJECTED!

Do you have a change of heart now? Would you like me to set it up?

Now how on earth did you read this into what I asked for? Do I have to go radio before you guys will produce a list of boundary conditions?

You've got an overdeveloped sense of drama. Just write up a list of your assumptions and reasoning. This is the way it's done, and it would make shockingly dry broadcast.

Also, this should be taken to the appropriate thread. This one of mine is suitable, for instance. See you there.


----

If you plan to leave this thread, can you please offer some recommendations for books or journals that can explain some of these things? I am certainly not an EE, but have a little background in physics, and the application of the two processes you mentioned (my bolding) sound fascinating. Thanks!

If it helps, the textbook I used (again) was Gray, Hurst, Lewis, and Meyer, "Analysis and Design of Analog Integrated Circuits," 4th Ed., Wiley, 2001. Given your familiarity with H&H this should be a good transition from basic circuit theory into device theory, not too heavy on the physics. The book doesn't go into full quantum theory but spends a lot of time on mask design constraints and limitations, and where those come from physically, both for bipolar and MOS devices.

I don't have too much to compare to, but I found it helpful.

 

[jaydeehess]

No, that is totally incorrect. It will not take at least one second. If that
were true, the system would have constant delay and crash.

does the buffer wait until an entire frame is within the buffer before it starts to write that frame to memory or not?
If so(and you have stated as much before) then how long does it take to have a frame's worth of data collected and compiled?

You still do not understand.

All you need to remember is MAX time for data to store itself into CPM is
500 msec from the sensor.

See above.

OK.



OK



OK



OK...



Not OK. It can't erase JUST the last few seconds. It must take out the
entire block as per design.

It is apparent that You still do not understand.(or you are being wilfully ignorant)


Sheesh,,, the block only contains the last few seconds of data when it gets erased. Yes the whole block gets erased but except for the first dozen or so Kb that block is all 1's already.

The block was essentially empty and the writing of new data has only begun to fill it with new data.

The erase command resets a memory block that is about the size of 40 frames worth of data. Which occured without incident BEFORE the last few seconds of flight. It takes time to fill that newly erased block. It gets re-erased erroneously when it contains only a few frames worth of new data. It gets no more new data since the entire aircraft is rather unservicable by this time.

Furthermore as MacGyverS2000 explains an erase is not an instantaneous-snap-all-locations-set-to-1 operation you insist it must be and it could easily be much worse during a transient induced erroneous erase operation.


,,,,,,, and this is but one method by which flash memory can lose data as has also been explained by MacGyverS2000.

Your continued insistance that an FDR memory cannot ever lose data in the face of overwhelming instruction that it indeed can belies a belief system that is akin to religion.

So, the FDR contains data up to approx 4-6 seconds prior to impact. The data it does contain show the aircraft to be along the same path that RADES data shows it to take, and the path along which lie the downed lamp poles. The DME data has inherent errors in it that make the recorded distances consistent with the accepted flight path of the aircraft. The DNA of the passengers and crew of AA77 were found within the Pentagon. Aircraft parts consistent with AA77 were found within the Pentagon.

It quacks, it paddles about in the water, it eats aquatic plant matter, has webbed feet, has a bright green head and the zoo has put up a sign with an arrow pointing at the animal which reads "male Mallard duck". I, for one, believe that it is a male Mallard duck and not an platypus.

 

[Turbofan]

An excellent question, and one I'm happy to answer for everyone else's benefit. You make the erroneous assumption that a block erase command erases an entire block of memory in an instant. You can time with a stopwatch how long it takes a 128Mb flash to erase all of its blocks. Think on the order of a full second to erase a single block (max spec is typically a full 4 seconds to erase a single block)!

This should point out the fact that the entire block isn't erased at once, but in lines (columns or rows, take your pick). Care to take a guess what would happen if the erase process was interrupted in the middle? Since the write latency must be <500ms, this tells you right away the firmware must continually suspend the block erasure process to write incoming frame data. I won't bother getting into the myriad of possible problems these suspends can have on data integrity, particularly in a transient-rich electrical environment.


You need to spend some time looking at hot-electron injection and quantum tunneling... these are the two processes by which the transistors (MOSFETS) change their state (at least for a NOR-based package). Flash chips contain their own charge pump to create the higher programming voltage, and I think it should be quite obvious by now that a charge pump is going to have some weird outputs during transients (where under the right conditions "ground" can actually be at a higher voltage then "power").



So I say yet again, your theories are easily blown out of the water. I'm not pulling the stuff out of my ass, these are well known and (mostly) well-defined failure modes. The next step to proving all of this to you will involve semiconductor physics, something I'm not prepared to waste time discussing and few here are informed enough to comprehend without heavy explanation.

My previous statement stands, I have zero interest in my name being associated with your claims. You have repeatedly shown a penchant for ignoring my direct answers to your specific questions when push comes to shove about your overall claims, so I will no longer increase my risk of carpal tunnel just to argue minutiae that is no longer relevant. I never had delusions about friendships here (my statement was metaphorical in nature), but I obviously hoped for too much when...

You don't have to put your name to my claims. YOu don't have to worry
about me using your answers for my personal gain.

All I wanted was a direct explanation of how it would be possible to erase
a few seconds worth of data.

I have a lot of respect for your knowledge of the EEPROM, and I'm not going
to question your replies any further.

I will say however that these are not my theories. These are the theories
of the members at JREF.

Now call me crazy, but the odds that the silly little transient picked out the
last few seconds of data that had already been written is just a crazy oddity.
I wont even ask your opinion on the chances of this happening...

This block has just been erased and in process of writing, but by the odds
of 9/11 the transient envokes an erase function and removes 2-4 seconds
of data. Just enough to leave the aircraft too high and too close to hit the
light poles at 1.5 DME and a few hundred feet up.

So now we're left with clock sync. vs NTSB impact time and flight study.

Basically back to square one.

For what it's worth MacGyver, I really do appreciate your time here as you
were sucked in from the Eng-Tips forum. We surely got off on the wrong
foot. I'll share this information with my team in any case. It's not critical
to revealing/proving anything; it was more a challenge between Mackey and
myself.

It turns out from your professional viewpoint that I was incorrect about
partial block erasure. As stubborn as I am, I will continue to research
the EEPROM and learn more about the Intel design.

I thought pure scientific fact would be taken for its own value and not abused

It wasn't my intent to abuse. I was trying to get clarification due to most
all of the other members putting in their two cents. As you can see, by
answering my last question directly, there is no confusion about corrupted
data, or current buffered data getting erased. This was all about the last
few seconds of stored info.

If you only knew some of the other abuse of fact going on throughout this
thread...you might take a step back and retract some of your opinions about
me.

I'm glad you understand the 500 msec specification, and that there are no
delays throughout the system. This is something the other guys should
seriously consider as they move forward debating the FDR with me and other
members of PFT.

It's safe to say, both sides of this argument have learned something.

Well Jay, Beach and Mackey...we're down to ALT, 1.5 DME and clock sync.
What hit the light poles?

 

[beachnut]

You do not understand accuracy, resolution, the FDR, or 9/11. Clean sweep!

 

[Turbofan]

It is apparent that You still do not understand.(or you are being wilfully ignorant)

Not a chance. It's all about clarity for me.

Sheesh,,, the block only contains the last few seconds of data when it gets erased. Yes the whole block gets erased but except for the first dozen or so Kb that block is all 1's already.

What are the odds? What ARE the odds? Now you want it to be the beginning
of a new block. All of these theories are just
so remote that it's tough to believe.

For everything to happen your way, it has to be max tolerance...it has to
be this...it has to be that...a few seconds of the last bit of data...etc.

The block was essentially empty and the writing of new data has only begun to fill it with new data.

Call me crazy, but if I was on the NTSB crew and I saw a block of 1's,
no EOF in a system that is supposed to be a 'continuous loop' flash,
don't you think it would be noted in the report?

Don't you think they would have caught onto the fact that several 1's
were written during the last portion of the file? No mention of this?
No hypothesis to this 'fact' in their study?

I find this strange and unlikely.

The erase command resets a memory block that is about the size of 40 frames worth of data. Which occured without incident BEFORE the last few seconds of flight. It takes time to fill that newly erased block. It gets re-erased erroneously when it contains only a few frames worth of new data. It gets no more new data since the entire aircraft is rather unservicable by this time.

See above.

Furthermore as MacGyverS2000 explains an erase is not an instantaneous-snap-all-locations-set-to-1 operation you insist it must be and it could easily be much worse during a transient induced erroneous erase operation.

See above. Yet this doesn't explain the time stamps, the proximity to the
poles, the alt, etc.

Your continued insistance that an FDR memory cannot ever lose data in the face of overwhelming instruction that it indeed can belies a belief system that is akin to religion.

There is quite a bit of 'religion' going on with these assumptions of 'lost data'
Enough religion that the NTSB didn't even report it.

The DME data has inherent errors in it that make the recorded distances consistent with the accepted flight path of the aircraft. The DNA of the passengers and crew of AA77 were found within the Pentagon. Aircraft parts consistent with AA77 were found within the Pentagon.

The DME that Beachnut claims is in error, but the system reported within tolerance? I think not.

Don't forget, tolerance works both ways, but you guys would never be
bold enough to think it would error on the short side huh? PFT at least
had the balls and honesty to report their studies with max deflection and
min deflection. The NTSB numbers still don't add up.

My opinion about the Pentagon is it stinks like pig droppings and duck
dropping all at once.

Light pole in a cab?
FDR data not adding up
Multiple NoC witnesses on video
Lack of debris
Original news coverage banned from TV
First responder testimony of bombs ignored
Cars over 1/4 mile from Towers on fire
Lack of Pentagon wall damage
Hani's time wasting loop
Failure for your defence to intercept "AA77" after twins had been hit
3 towers fall from fire for the first time in history, symmetrically, quickly
Independent Lab reports, peer review in 08 and research studies of thermate
No plane found in Shanksville...just a tiny hole

Sad. That's just a baby list too.

 

[R.Mackey]

Texas Sharpshooter Fallacy.

Your whole argument is not predicated on any of our various explanations being improbable, but upon them being impossible. Since you now appear to accept that they are, indeed, possible, then your only recourse is to (a) provide a superior theory, or (b) concede.

Took you long enough, to be sure.

 

[Jonnyclueless]

Light pole in a cab?
FDR data not adding up
Multiple NoC witnesses on video
Lack of debris
Original news coverage banned from TV
First responder testimony of bombs ignored
Cars over 1/4 mile from Towers on fire
Lack of Pentagon wall damage
Hani's time wasting loop
Failure for your defence to intercept "AA77" after twins had been hit
3 towers fall from fire for the first time in history, symmetrically, quickly
Independent Lab reports, peer review in 08 and research studies of thermate
No plane found in Shanksville...just a tiny hole

Sad. That's just a baby list too.

A light pole striking an object such as a car is pretty reasonable
An FDR under the etremes of a solid impact are not going to be predictable. It's nt an issue of not adding up.
Many of those NoC witnesses also saw the plane hit the building. And the fact is that it's very hard to judge placement on something ike a plane and memory is unreliable. This is why eyewitness accounts are generally not used in accidents. however they are pretty much the entire argument of CIT and all the other arguments are based on this one.
There was no lack of debris
The original news footage was not banned from TV
There was no first responder testimony of bombs, simply crackpots taking testimony out of context and quote mining
The cars 1/4 a mile away were moved there. Not that it would even be proof of a controlled demolition anyways.
There wasn't a lack of Pentagon wall damage and it was perfectly consistent with that of AA77
There was nothing odd about Hani's loop let alone time wasting.
How is the failure of intercepting AA77 suspicious when never before has a commercial jet been intercepted?
It wasn't the first time in history that buildings have failed from fire. And a lot of things happened for the first time. But the argument is meaningless since all your beliefs would also be a first time in history anyways.
95% of the plane was found at Shanksville.

So as you can see most of the basis for this belief in a conspiracy theory are based on incorrect information.

 

[Turbofan]

Texas Sharpshooter Fallacy.

Your whole argument is not predicated on any of our various explanations being improbable, but upon them being impossible. Since you now appear to accept that they are, indeed, possible, then your only recourse is to (a) provide a superior theory, or (b) concede.

Took you long enough, to be sure.

I take as much time as needed to get the facts. I don't sit behind a screen
and do research, I call manufacturers and research.

Nothing changes here other than the fact that I was wrong about the
transient(s) erasing only seconds of data. Believe me, I will be study the
Intel design and make phone calls just the same. I will give you that
Mackey, you were correct - I was apparently wrong.

Now, how long did it take you (and others) to realize the specs meant what
I've been stating all of this time? Did it finally take an E.E. to set a few non
electrical engineers straight? Do you all see there is no such thing as this 'delay' crap now? I wont ask for an apology even though I owned up
for my mistake. Just remember all the hard times JREF members gave me
(and other PFT members) for this spec. interpretation.

What's your best guess as to why the NSTB couldn't find, report, or figure
out the "frames of erased data" having 1's appear at these word locations?

 

[R.Mackey]

I am unaware of any claim you've made that is correct. I am quite certain that none of them have been properly supported.

My best guess about the NTSB report is that they didn't care. The FDR is used, you may recall, to understand why crashes happen. In this particular investigation, the precise impact time, exact altitude, etc. are not necessary to make this determination. It is enough to know that an aircraft crashed into the Pentagon, that there was only one aircraft outstanding, and the narrative taken from the FDR -- the whole narrative, from takeoff onward -- fits FAA tracking data, visual reports, etc. Which it does.

For this reason, the NTSB probably didn't even bother to work on the last few scraps, and certainly didn't to the level of precision that your arguments require. Compare the FDR report from AA 77 to that from AA 587, where much of the crash phenomenology happened after the FDR started getting squirrelly, and therefore a deep analysis of the garbage data is warranted. Here, it just isn't important.

The fallacy at the heart of this, as it has been from the start, is one of False Precision. You are simply unwilling to accept experimental and random error. From this, however, you apparently are willing to draw the most fantastic conclusions, without the least bit of experimental verification or accuracy. The subsequent error is an Equivocation Fallacy, in essence stating that, since the "official story" is not 100% precise, then any other theory is equally credible. That just isn't so.

Now, again, if you wish to respond further, your options are to present a better theory, or else let it go. We've seen the depth of your technical expertise, and collectively found it insufficient. No further discussion down that path is recommended.

 

[Turbofan]

A light pole striking an object such as a car is pretty reasonable

Not in the manner for Lloyd's cab

An FDR under the etremes of a solid impact are not going to be predictable. It's nt an issue of not adding up.

See question about lack of NTSB discovery of reset block, and no mention
in report.

Many of those NoC witnesses also saw the plane hit the building. And the fact is that it's very hard to judge placement on something ike a plane and memory is unreliable.

Not likely when several disconnected people report the same thing.

This is why eyewitness accounts are generally not used in accidents.

Not true.

There was no lack of debris

Your opinion

The original news footage was not banned from TV

retracted, omitted. Some shown once.

There was no first responder testimony of bombs, simply crackpots taking testimony out of context and quote mining

Absolutely false. Video of firefighter, police, first responder feeling and
hearing bombs.

The cars 1/4 a mile away were moved there. Not that it would even be proof of a controlled demolition anyways.

Not moved. I have photo of the vehicle fires in a parking lot behind WTC7
long before it fell.

There wasn't a lack of Pentagon wall damage and it was perfectly consistent with that of AA77

Disagree. Many threads about this already.

There was nothing odd about Hani's loop let alone time wasting.

Your opinion. Funny yet.

How is the failure of intercepting AA77 suspicious when never before has a commercial jet been intercepted?

Twins both hit 30+ minutes earlier.

It wasn't the first time in history that buildings have failed from fire. And a lot of things happened for the first time.

Do tell. Example? Column 79 "phenomenon".

95% of the plane was found at Shanksville.

Not in, or near the hold where it should have been.

So as you can see most of the basis for this belief in a conspiracy theory are based on incorrect information.

That's right, the offical government conspiracy theory.

 

[Jonnyclueless]

Turbofan, there are threads that prove each and every one of those issues. And like this thread, they show your claims to be 100% wrong. I am not going to go into it here because it's off topic. but feel free to participate in all of those other individual threads.

 

[twinstead]

The only thing I can say is the ability to argue an untenable position forever is an art, and you, Turbofan, are an artist.

 

[TexasJack]

For what it's worth MacGyver, I really do appreciate your time here as you
were sucked in from the Eng-Tips forum. We I surely got off on the wrong foot.

Fixed it for you.